发明名称 |
Current limitation for low dropout (LDO) voltage regulator |
摘要 |
<p>A method and circuits to limit the output load current of a current driven LDO voltage regulator are disclosed. The current through a second pass transistor, being in parallel to a first pass transistor and being a fraction of the current through the first pass transistor is measured and compared with a reference current. In case the current through the second pass transistor is larger than this reference current the current through the gates of both pass devices is reduced and thus the output load current of the voltage regulator is limited.</p> |
申请公布号 |
EP2527946(B1) |
申请公布日期 |
2013.12.18 |
申请号 |
EP20110368013 |
申请日期 |
2011.04.13 |
申请人 |
DIALOG SEMICONDUCTOR GMBH |
发明人 |
ARIGLIANO, ANTONELLO;MARSCHALKOWSKI, ERIC |
分类号 |
G05F1/573 |
主分类号 |
G05F1/573 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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