| 摘要 |
The device includes a first conductive type semiconductor region, a trench extended into the semiconductor region and a field plate within the trench wherein the field plate is conductive. A first dielectric layer separates a lower end and a side wall of the field plate from the semiconductor region. A main gate is arranged within the trench and is overlapped with the field plate. A second dielectric layer is arranged between the main gate and the field plate and separates the main gate from the field plate. A first conductive type doped drain (DD) region is positioned under a second dielectric region and an edge part of the main gate is overlapped with the DD region. A main body region includes a first portion being at the same level as a part of the main gate and a second portion being at the same level of the DD region and being in contact with the DD region. The main body region has a second conductive type which is contrary to the first conductive type. |
