发明名称 SEMICONDUCTOR WAFER PLATING BUS AND METHOD FOR FORMING
摘要 A semiconductor wafer includes a die, an edge seal, a bond pad, a plating bus, and trace. The die is adjacent to a saw street. The edge seal is along a perimeter of the die and includes a conductive layer formed in a last interconnect layer of the die. The bond pad is formed as part of metal deposition layer above the last interconnect layer or part of the last interconnect layer. The plating bus is within the saw street. The trace is connected to the bond pad and to the plating bus (1) over the edge seal, insulated from the edge seal, and formed in the metal deposition layer or (2) through the edge seal and insulated from the edge seal.
申请公布号 US2013309860(A1) 申请公布日期 2013.11.21
申请号 US201313948927 申请日期 2013.07.23
申请人 UEHLING TRENT S.;FREESCALE SEMICONDUCTOR, INC. 发明人 UEHLING TRENT S.
分类号 H01L21/768 主分类号 H01L21/768
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