CIRCUITS CONFIGURED TO REMAIN IN A NON-PROGRAM STATE DURING A POWER-DOWN EVENT

摘要

[0071] In a particular embodiment, an apparatus includes a one- time programmable (OTP) memory circuit (324) configured to be responsive to a programming voltage (308). The OTP memory circuit includes an OTP memory array (220) including OTP memory cells, a first power switch (326) configured to decouple the OTP memory array (220) from the programming voltage (308), and a second power switch (328) configured to decouple a subset of the OTP memory cells from the programming voltage (308). Control logic (216) controls the power switches (326, 328) and is configured to maintain the OTP memory array (220) in a non-program state during a power-down event