发明名称 Clock change device and clock change method
摘要 A clock change method includes: converting the serial data synchronized to a first clock into parallel data; latching the serial-to-parallel converted data into a designated data storing circuit with a latch timing that occurs once in every a number of clock cycles of a second clock; and converting the latched parallel data into the serial data synchronized to the second clock, and wherein: each time a packet of serial data synchronized to the first clock is received, a timing adjustment is performed to adjust the latch timing so that the latch timing occurs a predetermined time after occurrence of a conversion timing for converting the serial data synchronized to the first clock into the parallel data.
申请公布号 US8582711(B2) 申请公布日期 2013.11.12
申请号 US20100797834 申请日期 2010.06.10
申请人 TSUSHITA KATSUYA;FUJITSU LIMITED 发明人 TSUSHITA KATSUYA
分类号 H04L7/00 主分类号 H04L7/00
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