| 摘要 |
<p>The energy meter (1) has software units (20) to force a logic gate i.e. input/output port (18) of microprocessor or microcontroller (17), at logic level 1. The units position the gate as an input receiving a voltage level at terminals of a filtering capacitor (C1) for discharging the capacitor and sample the received voltage level at end of a predefined duration. The units deduce whether the gate is at the level 1 or 0 based on whether the sampled voltage level is more than minimum high threshold or less than maximum low threshold, and forces the gate to the level 0 during capacitor discharge.</p> |
