发明名称 HIERARCHICAL MEMORY MAGNETORESISTIVE RANDOM-ACCESS MEMORY (MRAM) ARCHITECTURE
摘要 <p>A hierarchical memory magnetoresistive random-access memory architecture is disclosed. In a particular embodiment, an apparatus includes a first magnetoresistive random-access memory (MRAM) device corresponding to a first level in a hierarchical memory system. The apparatus includes a second MRAM device corresponding to a second level in the hierarchical memory system. The first MRAM device has a first access latency and includes a first magnetic tunnel junction (MTJ) device having a first physical configuration. The second MRAM device has a second access latency and includes a second MTJ device having a second physical configuration. The first access latency is less than the second access latency.</p>
申请公布号 WO2013158958(A1) 申请公布日期 2013.10.24
申请号 WO2013US37306 申请日期 2013.04.19
申请人 QUALCOMM INCORPORATED 发明人 KANG, SEUNG H.;ZHU, XIAOCHUN
分类号 G11C11/16;G06F12/08 主分类号 G11C11/16
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