发明名称 NONVOLATILE MEMORY, ELECTRONIC APPARATUS, AND VERIFICATION METHOD
摘要 A gate voltage generator which supplies first gate voltage at erase verify time to a first selected word line to which a first memory cell included in N memory cells is connected, which supplies the first gate voltage at the erase verify time to a second selected word line to which a first reference cell included in M reference cells is connected, which supplies second gate voltage at the erase verify time to a first non-selected word line connected to a memory cell array, and which supplies third gate voltage at the erase verify time to a second non-selected word line connected to a reference cell array is included. An electric current which flows through a reference cell connected to the second non-selected word line is stronger than an electric current which flows through a memory cell connected to the first non-selected word line.
申请公布号 US2013272074(A1) 申请公布日期 2013.10.17
申请号 US201313856205 申请日期 2013.04.03
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 TANAKA KENGO
分类号 G11C7/14 主分类号 G11C7/14
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