Integration of MOSFETs in a source-down configuration

摘要

An output stage for a switched mode power supply has a high-side switch having a first power FET and a first speed-up FET monolithically integrated onto a first die. A low-side switch has a second power FET and a second speed-up FET monolithically integrated onto a second die. A semiconductor device has the power FET and the speed-up FET monolithically integrated in a "source-down" configuration. A method of operating an output stage of a switched mode power supply alternately turns on and off a high-side and a low-side switch and drives at least one of the switches with a speed-up FET monolithically integrated with the switch.