发明名称 |
LATENCY CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE COMPRISING SAME |
摘要 |
A latency control circuit is configured to delay a read information signal in response to a CAS latency signal and an internal clock signal to generate a delayed read information signal, and is further configured to generate a latency control signal based on the delayed read information signal in response to a plurality of sampling control signals and a plurality of transfer control signals. |
申请公布号 |
US2013208546(A1) |
申请公布日期 |
2013.08.15 |
申请号 |
US201313743412 |
申请日期 |
2013.01.17 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD.;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM SI-HONG;BAE SEUNG-JUN;KIM HYE-RAN;SEOL HO-SEOK |
分类号 |
G11C8/18;G11C7/10 |
主分类号 |
G11C8/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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