发明名称 COMPILING METHOD, PROGRAM, AND INFORMATION PROCESSING APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a compiling method, a program and an information processing apparatus that are capable of lowering a CPU load and decreasing memory consumption by reducing guard codes which need to be embedded in a compiled code, when an indirect branch instruction is included in a machine language code to be compiled.SOLUTION: The compiling method implemented by an information processing apparatus includes the steps of: generating intermediate code from a trace, which is an instruction sequence described in a machine language; computing an offset between an address value, which is a base point of an indirect branch instruction, and a start address of a memory page, which includes a virtual address referred to by the information processing apparatus immediately after processing a first instruction; determining whether processing jumps to another memory page, using as an offset a value obtained by adding a displacement made by an indirect branch instruction, which is a second instruction subsequent to the first instruction; and optimizing the intermediate code by using the result of the determining step.
申请公布号 JP2013156971(A) 申请公布日期 2013.08.15
申请号 JP20120019524 申请日期 2012.02.01
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 TAKASU TOSHIHIKO;ALI I SHEIKH;XIN TONG
分类号 G06F9/45 主分类号 G06F9/45
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