发明名称 |
METHOD FOR MANUFACTURING LAMINATED CHIP PACKAGE |
摘要 |
PROBLEM TO BE SOLVED: To enable mass production of a laminated chip package at low costs and in a short time.SOLUTION: A laminated chip package comprises a plurality of laminated layer portions each including a semiconductor chip having a first surface having a device formed thereon and a second surface on a side opposite to the first surface. The plurality of layer portions includes one pair or more of layer portions arranged so that the first surface of the semiconductor chip faces each other. A method for manufacturing the laminated chip package comprises: laminating a plurality of substructures 110 including a plurality of layer portions each corresponding to each of the plurality of layer portions of the laminated chip package to form a laminated substructure; and forming the plurality of laminated chip packages by using the laminated substructure. In the step of forming the laminated substructure, first and second pre-polishing substructures each having first and second surfaces are formed, and the substructures are bonded so that the first surface faces each other, and the second surfaces are polished to form first and second substructures 110. |
申请公布号 |
JP2013150010(A) |
申请公布日期 |
2013.08.01 |
申请号 |
JP20130089040 |
申请日期 |
2013.04.22 |
申请人 |
HEADWAY TECHNOLOGIES INC;TDK CORP |
发明人 |
SASAKI YOSHITAKA;ITO HIROYUKI;HARADA TATSUYA;OKUZAWA NOBUYUKI;SUEKI SATORU |
分类号 |
H01L25/065;H01L21/304;H01L23/52;H01L25/07;H01L25/18 |
主分类号 |
H01L25/065 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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