发明名称 |
Memory device and error control codes decoding method |
摘要 |
Memory devices and/or error control codes (ECC) decoding methods may be provided. A memory device may include a memory cell array, and a decoder to perform hard decision decoding of first data read from the memory cell array by a first read scheme, and to generate output data and error information of the output data. The memory device may also include and a control unit to determine an error rate of the output data based on the error information, and to determine whether to transmit an additional read command for soft decision decoding to the memory cell array based on the error rate. An ECC decoding time may be reduced through such a memory device.
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申请公布号 |
US8499217(B2) |
申请公布日期 |
2013.07.30 |
申请号 |
US20080153121 |
申请日期 |
2008.05.14 |
申请人 |
SONG SEUNG-HWAN;KONG JUN JIN;KIM JAE HONG;CHO KYOUNG LAE;PARK SUNG CHUNG;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SONG SEUNG-HWAN;KONG JUN JIN;KIM JAE HONG;CHO KYOUNG LAE;PARK SUNG CHUNG |
分类号 |
H03M13/00;G06F11/00;G11C29/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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