发明名称 RECEIVING SIDE DEVICE AND COMMUNICATION SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a receiving side device and a communication system that can generate a second clock signal with a less frequency change rate than a first clock signal from the first clock whose frequency changes temporally and a numerical value corresponding to the frequency.SOLUTION: A receiving side device comprises: a reception block which receives a first clock signal whose frequency changes temporally, and receives, in order, numerical values corresponding to the frequency of the first clock signal obtained at a plurality of time points within a period of the change of the frequency of the first clock signal; a correction block which obtains the direction of the change of the numerical values on the basis of the numerical values received in order by the reception block and corrects the received numerical values; and a clock generation block which generates a second clock signal by using the received first clock signal the numerical values corrected by the correction block. The correction block performs correction according to the direction of the change and time difference between time when the numerical values were obtained and time when the clock generation block generated the second clock signal.
申请公布号 JP2013143577(A) 申请公布日期 2013.07.22
申请号 JP20120001281 申请日期 2012.01.06
申请人 KAWASAKI MICROELECTRONICS INC 发明人 UCHIYAMA YOSHIHIRO
分类号 H04L7/02;G06F1/12;H04L7/00 主分类号 H04L7/02
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