Resistive memory device and operating method

摘要

Provided are a resistive memory device including a plurality of memory cells, and a method of operating the resistive memory device. The resistive memory device includes a sensing circuit connected to a first signal line, to which a memory cell is connected, the sensing circuit sensing data stored in the memory cell based on a first reference current; and a reference time generator for generating a reference time signal that determines a time point when a result of the sensing is to be output, based on the first reference current.

主权项

1. A resistive memory device comprising:
a memory cell array including a memory cell connected to a first signal line and a second signal line; a sensing circuit connected to the first signal line, wherein the sensing circuit is configured to sense data stored in the memory cell based on a first reference current flowing through the first signal line; and a reference time generator is configured to generate a reference time signal that determines a time at which the sensing of the stored data by the sensing circuit occurs based on the first reference current, wherein the sensing circuit comprises
a first current source configured to provide the first reference current to the first signal line,a first capacitor connected to the first signal line, anda sense amplifier configured to compare a first reference voltage with a voltage apparent on the first signal line in response to the reference time signal, wherein the reference time generator comprises
a second current source configured to generate a second reference current based on the first reference current,a second capacitor charged by the second reference current, anda comparator configured to compare a second reference voltage with a voltage of the second capacitor and provide a corresponding comparison result as the reference time signal, and wherein a time required for the first capacitor to be charged to a level of the first reference voltage in response to the first reference current is less than a time required for the second capacitor to be charged to a level of the second reference voltage in response to the second reference current.