发明名称 |
Content-Addressable Memory Architecture for Routing Raw Hit Lines Using Minimal Base Metal Layers |
摘要 |
A CAM circuit includes a plurality of core memory cells, each cell including comparison logic for generating a local match signal based on a comparison between stored data in the cell and a compare value. The CAM circuit includes a plurality of local match lines, each local match line coupled with a corresponding cell and adapted to convey the local match signal generated by the cell. The CAM circuit includes combination logic for receiving respective local match signals generated by a subset of the cells and for generating an output word match signal having a value indicative of the local match signals. The subset of cells is arranged with at least one block having a word size that is limited based on available space for routing tracks used to convey the local match signals and at least one word match signal in a base metal layer across the cells.
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申请公布号 |
US2013170273(A1) |
申请公布日期 |
2013.07.04 |
申请号 |
US201113340149 |
申请日期 |
2011.12.29 |
申请人 |
RACHAMADUGU VINOD;ROY UDDIP;RAO SETTI SHANMUHKHESWARA;LSI CORPORATION |
发明人 |
RACHAMADUGU VINOD;ROY UDDIP;RAO SETTI SHANMUHKHESWARA |
分类号 |
G11C15/00 |
主分类号 |
G11C15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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