发明名称 Apparatus and methods for forming through vias
摘要 Methods and apparatus for forming through vias in an integrated circuit package are disclosed. An apparatus is disclosed, having a substrate having one or more bond pad terminals for receiving electrical connections on at least one surface; an encapsulation layer covering the at least one surface of the substrate and having a first thickness; a plurality of through vias extending through the encapsulation layer and positioned in correspondence with at least one of the one or more bond pad terminals; conductor material disposed within the plurality of through vias to form electrical connectors within the plurality of through vias; and at least one external terminal disposed on a surface of the encapsulation layer, electrically coupled to one of the one or more bond pad terminals by an electrical connector in at least one of the plurality of through vias. Package arrangements and methods for the through vias are disclosed.
申请公布号 US8476770(B2) 申请公布日期 2013.07.02
申请号 US201113178345 申请日期 2011.07.07
申请人 SHAO TUNG-LIANG;TUNG CHIH-HANG;YU CHEN-HUA;TSAI HAO-YI;LII MIRNG-JI;SHIH DA-YUAN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 SHAO TUNG-LIANG;TUNG CHIH-HANG;YU CHEN-HUA;TSAI HAO-YI;LII MIRNG-JI;SHIH DA-YUAN
分类号 H01L23/48 主分类号 H01L23/48
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