Analog to digital conversion

摘要

A delta-sigma analog-to-digital converter (100) comprises: a summing stage (20) having a first input (22) for an input signal (V IN ) and a second input (23) for a feedback signal (V FB ); an integrator (30) coupled to an output (24) of the summing stage (20); an analog-to-digital conversion stage (40) coupled to an output (34) of the integrator (30); and a switchable gain stage (70) coupled in a feedback path (80) between an output (44) of the analog-to-digital conversion stage (40) and the second input (23) of the summing stage (20). The switchable gain stage (70) is arranged to switch, responsive to a gain selection signal (S), between a first gain and a second gain via a transition period (T) comprising time periods during which the switchable gain stage (70) has the first gain interleaved with time periods during which the switchable gain stage (70) has the second gain. The time periods at the first gain comprise periods that decrease in duration over the transition period (T) and the time periods at the second gain comprise periods that increase in duration over the transition period (T).