发明名称 ELECTROPLATING METHODS FOR FABRICATING INTEGRATED CIRCUIT DEVICES AND DEVICES FABRICATED THEREBY
摘要 Provided are methods of fabricating a semiconductor device and semiconductor devices fabricated thereby. In the methods, dummy recess regions may be formed between cell recess regions and a peripheral circuit region. Due to the presence of the dummy recess regions, it may be possible to reduce a concentration gradient of a suppressor contained in a plating solution near the dummy pattern region, to make the concentration of the suppressor more uniform in the cell pattern region, and to supply an electric current more effectively to the cell pattern region. As a result, a plating layer can be more uniformly formed in the cell pattern region, without void formation therein.
申请公布号 US2013147005(A1) 申请公布日期 2013.06.13
申请号 US201213707425 申请日期 2012.12.06
申请人 SAMSUNG ELECTRONICS CO., LTD.;SAMSUNG ELECTRONICS CO., LTD. 发明人 HONG JONGWON;PARK INSUN;KIM HEI SEUNG;BAEK JONGMIN
分类号 H01L27/04 主分类号 H01L27/04
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