发明名称 SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD
摘要 <p>A system applying the present application is provided with a plurality of memory-cell arrays and a redundant cell array which is a backup memory-cell array for the abovementioned memory-cell arrays. The system is further provided with: a plurality of write circuits for writing data to each of the plurality of memory-cell arrays and the redundant cell array; a holding unit, disposed separately from the memory-cell arrays, for holding data that has been input to be stored; selection units disposed with each of the memory-cell array write circuits, for selecting data to be output to the write circuits from among the data input from the holding unit of the memory-cell arrays or the holding unit of other memory-cell arrays; and a switching unit for, when a predetermined signal is active, causing the selection of the same data by two or more selection units, and causing the same data to be input to three or more write circuits, whereby this same data is caused to be written to two or more memory-cell arrays and the redundant cell array.</p>
申请公布号 WO2013080309(A1) 申请公布日期 2013.06.06
申请号 WO2011JP77580 申请日期 2011.11.29
申请人 FUJITSU LIMITED;MURATA, SEIJI 发明人 MURATA, SEIJI
分类号 G11C29/04;G11C29/34 主分类号 G11C29/04
代理机构 代理人
主权项
地址