发明名称 |
(110) SURFACE ORIENTATION FOR REDUCING FERMI-LEVEL-PINNING BETWEEN HIGH-K DIELECTRIC AND GROUP III-V COMPOUND SEMICONDUCTOR SUBSTRATE |
摘要 |
A device with improved device performance, and method of manufacturing the same, are disclosed. An exemplary device includes a group III-V compound semiconductor substrate that includes a surface having a (110) crystallographic orientation, and a gate stack disposed over the group III-V compound semiconductor substrate. The gate stack includes a high-k dielectric layer disposed on the surface having the (110) crystallographic orientation, and a gate electrode disposed over the high-k dielectric layer.
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申请公布号 |
US2013126985(A1) |
申请公布日期 |
2013.05.23 |
申请号 |
US201113299529 |
申请日期 |
2011.11.18 |
申请人 |
CHENG CHAO-CHING;KO CHIH-HSIN;WANN HSINGJEN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHENG CHAO-CHING;KO CHIH-HSIN;WANN HSINGJEN |
分类号 |
H01L29/772;H01L21/28 |
主分类号 |
H01L29/772 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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