发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A semiconductor memory device is provided to improve a duty property of data outputted from a trigger by including device controlled by an output enable signal in the front of the trigger. CONSTITUTION: A pipe latch circuit(220) includes a pipe latch unit(221) and a pipe latch driving unit(223). The pipe latch unit serially outputs data which is inputted in parallel. The pipe latch driving unit outputs the data which is serially outputted through the pipe latch unit or fixes an output terminal with a preset voltage level in response to an enable signal. A synchronization circuit(230) synchronizes the output of the pipe latch circuit with an internal clock and outputs the synchronized output. [Reference numerals] (210) Output control signal generation unit; (221) Pipe latch unit; (223) Pipe latch driving unit; (231) Clock generation unit; (233) Trigger; (241) Predriver; (243) Output buffer
申请公布号 KR20130050095(A) 申请公布日期 2013.05.15
申请号 KR20110115255 申请日期 2011.11.07
申请人 SK HYNIX INC. 发明人 KIM, YONG MI
分类号 G11C7/10;G11C7/22;G11C8/00 主分类号 G11C7/10
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