发明名称 On-Die Logic Analyzer For Semiconductor Die
摘要 In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
申请公布号 US2013103987(A1) 申请公布日期 2013.04.25
申请号 US201213710919 申请日期 2012.12.11
申请人 ZHONG TINA C.;SANDRI JASON G.;GRIESSER KENNETH P.;BORGER LORI R. 发明人 ZHONG TINA C.;SANDRI JASON G.;GRIESSER KENNETH P.;BORGER LORI R.
分类号 G06F11/07 主分类号 G06F11/07
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