| 摘要 |
<P>PROBLEM TO BE SOLVED: To easily generate layout patterns used for correctly verifying the validity of a design rule check. <P>SOLUTION: A graphics input section 24 accepts the input of an OK pattern that is generated so as to satisfy a predetermined drawing standard for a layout pattern of a semiconductor device. A reference position specification section 28 accepts, for the OK pattern, an input that specifies a part satisfying the drawing standard as a reference position. A verification pattern generation section 34 adds a predetermined change to the reference position of the OK pattern, thereby generating an NG pattern that does not satisfy the drawing standard. <P>COPYRIGHT: (C)2013,JPO&INPIT |
