发明名称 Combining instructions when the target of a first instruction is the source of the second
摘要 <p>Two instructions are identified. The target operand of the first instruction is a source operand of the second instruction. If this operand is not used again, then the two instructions are combined into a single instruction. The instructions may apply an immediate operand to a register operand. One instruction may apply an immediate operand to the most significant bits and the other instruction may apply another immediate operand to the least significant bits. If the immediate operand applied to the least significant bits is a negative sign extended value, then a one is subtracted from the immediate operand applied to the most significant bits. The first instruction may be retained and executed out of order.</p>
申请公布号 GB2495362(A) 申请公布日期 2013.04.10
申请号 GB20120013322 申请日期 2012.07.26
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 VALENTINE SALAPURA;MICHAEL KARL GSCHWIND
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
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