发明名称
摘要 <p>A semiconductor memory includes a memory cell having a cell transistor and a selection transistor, a control gate line coupled to a gate electrode of the cell transistor, a selection gate line coupled to a gate electrode of the selection transistor, a selection gate driver configured to apply a voltage to the selection gate line, a switch circuit configured to couple the control gate line to the selection gate line, and a level converting unit coupled to the control gate line and a voltage line and configured to convert a voltage of the control gate line into a voltage of the voltage line.</p>
申请公布号 JP5169773(B2) 申请公布日期 2013.03.27
申请号 JP20080302644 申请日期 2008.11.27
申请人 发明人
分类号 G11C16/04;G11C16/06 主分类号 G11C16/04
代理机构 代理人
主权项
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