发明名称 SYSTEM AND MEMORY MODULE
摘要 A system includes: a controller, a first memory module connected to the controller through a first data bus, and a second memory module connected to the controller through a second data bus, wherein the first memory module includes: first and second memory chips; a first data terminal connected to the first data bus, and a first switch unit that electrical connects the first data terminal with either the first memory chip and the second memory chip, and the second module includes: third and fourth memory chips; a second data terminal connected to the second data bus, and a second switch unit that switches over electrical connection of the second data terminal with either the third memory chip or the fourth memory chip.
申请公布号 US2013063998(A1) 申请公布日期 2013.03.14
申请号 US201213610282 申请日期 2012.09.11
申请人 HARASHIMA SHIRO;ELPIDA MEMORY, INC. 发明人 HARASHIMA SHIRO
分类号 G11C5/06 主分类号 G11C5/06
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