| 摘要 |
<p>Provided in the present invention is a separate three-dimensional memory (3D-M). Same comprises at lease two separate chips: a memory array chip and a peripheral circuit chip. The memory array chip comprises multiple 3D-M arrays established in a three-dimensional space. The peripheral circuit chip comprises at least one peripheral circuit component established on a two-dimensional plane. At lease one peripheral circuit component (such as a charge pump circuit) of the 3D-M is formed in the peripheral circuit chip, and not in the memory array chip. Array efficiency of the memory array chip is allowed to exceed 70% easily.</p> |
