发明名称 Chip Scale Package structure with can attachment
摘要 A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.
申请公布号 US8389335(B2) 申请公布日期 2013.03.05
申请号 US201213424610 申请日期 2012.03.20
申请人 GOH KIM-YONG;LUAN JING-EN;STMICROELECTRONICS ASIA PACIFIC PTE LTD 发明人 GOH KIM-YONG;LUAN JING-EN
分类号 H01L21/00 主分类号 H01L21/00
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