发明名称 |
LOW POWER TESTING OF VERY LARGE CIRCUITS |
摘要 |
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to plural shift states (500) to control each scan path in capturing data from response outputs of the combinational logic and then shifting one bit at a time to reduce the capacitive and constant state power consumed by shifting the scan paths.
|
申请公布号 |
US2013042161(A1) |
申请公布日期 |
2013.02.14 |
申请号 |
US201213653716 |
申请日期 |
2012.10.17 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
WHETSEL LEE D. |
分类号 |
G01R31/3177;G01R31/317;G01R31/3185 |
主分类号 |
G01R31/3177 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|