| 摘要 |
<p>Provided is a semiconductor integrated circuit, which has tolerance to power supply noise, and is capable of performing high-speed latch operations. The semiconductor integrated circuit is characterized in including: a latch circuit; a data applying circuit, which applies data to an input node of the latch circuit at timing corresponding to synchronization signals; and a back gate voltage control circuit which changes, at the timing corresponding to the synchronization signals, a back gate voltage of at least one transistor in an inverter included in the latch circuit.</p> |
