发明名称 |
INVERSION THICKNESS REDUCTION IN HIGH-K GATE STACKS FORMED BY REPLACEMENT GATE PROCESSES |
摘要 |
A method of forming a transistor device includes forming an interfacial layer on a semiconductor substrate, corresponding to a region between formed doped source and drain regions in the substrate; forming a high dielectric constant (high-k) layer on the interfacial layer, the high-k layer having a dielectric constant greater than about 7.5; forming a doped metal layer on the high-k layer; performing a thermal process so as to cause the doped metal layer to scavenge oxygen atoms diffused from the interfacial layer such that a final thickness of the interfacial layer is less than about 5 angstroms (Å); and forming a metal gate material over the high-k dielectric layer.
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申请公布号 |
US2012326245(A1) |
申请公布日期 |
2012.12.27 |
申请号 |
US201213605267 |
申请日期 |
2012.09.06 |
申请人 |
ANDO TAKASHI;NARAYANAN VIJAY;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ANDO TAKASHI;NARAYANAN VIJAY |
分类号 |
H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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