发明名称 PROCESSOR, DATA PROCESSING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE PROCESSOR
摘要 A processor includes an emulator configured to receive an access command from a second memory controller, and a first memory controller configured to control an operation of a memory. The emulator is configured to determine whether the first memory controller is available to perform an operation corresponding to the access command, and transmit a wait signal to the second memory controller upon determining that the first memory controller is not available to perform the operation.
申请公布号 US2012310621(A1) 申请公布日期 2012.12.06
申请号 US201213474942 申请日期 2012.05.18
申请人 JEONG SEH WOONG;KONG JAE SOP 发明人 JEONG SEH WOONG;KONG JAE SOP
分类号 G06F9/455;G06F12/00 主分类号 G06F9/455
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