发明名称
摘要 <P>PROBLEM TO BE SOLVED: To improve an yield by making the electrical characteristics of device chips uniformize, formed at the vicinity of forming region of an alignment mark for positioning a semiconductor wafer and other device chips formed in other regions. <P>SOLUTION: The semiconductor wafer 2 is provided with a plurality of device chip regions 4 formed in the plane of a substrate having multi-layers wiring structure, scribe lines 8 formed in the circumference of the device chip regions 4, in order to separate the device chip region 4 respectively and blank regions 6. The blank regions 6 comprise at least one alignment region 10 and the alignment mark is constituted of a metal film pattern on the uppermost layer surface of the alignment region 10. The alignment region 10 is provided with a size same as the device chip region 4 and patterns identical to the patterns formed on the same layer of the device chip region 4 are formed on the wiring layers below the uppermost layer, while a metal film which serves as the alignment mark is formed on the uppermost layer. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP5072384(B2) 申请公布日期 2012.11.14
申请号 JP20070039087 申请日期 2007.02.20
申请人 发明人
分类号 H01L21/027;G03F1/00;G03F1/42;G03F1/70;G03F7/20 主分类号 H01L21/027
代理机构 代理人
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