| 摘要 |
PURPOSE: A voltage generating circuit and a nonvolatile memory device including the same are provided to reduce a loading difference of signals by correlating the rising timing of bias voltages generated by various voltage generating circuits. CONSTITUTION: A first voltage generating unit(100) generates a first voltage applied to a memory cell transistor in the front and rear terminals of a selected memory cell transistor in a program operation. A second voltage generating unit(110) generates a second voltage applied to the remaining memory cell transistor except the memory cell transistor located in the front and rear terminals of the selected memory cell transistor in the program operation. A loading control unit(130) controls the loading timing by correlating the first voltage with the second voltage. [Reference numerals] (100) First high voltage generating unit; (110) Second high voltage generating unit; (120) Third high voltage generating unit; (130) Loading control unit
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