发明名称 Access signal adjustment circuits and methods for memory cells in a cross-point array
摘要 Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to generate access signals to facilitate memory operations in scaled arrays of memory elements, such as memory implemented in third dimensional memory technology formed BEOL directly on top of a FEOL substrate that includes data access circuitry. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements disposed among word lines and subsets of bit lines, and an access signal generator. The access signal generator can be configured to modify a magnitude of a signal to generate a modified magnitude for the signal to access a resistive memory element associated with a word line and a subset of bit lines. The modified magnitude can be a function of the position of the resistive memory element in the cross-point array.
申请公布号 US8305796(B2) 申请公布日期 2012.11.06
申请号 US201213425247 申请日期 2012.03.20
申请人 CHEVALLIER CHRISTOPHE;SIAU CHANG HUA;UNITY SEMICONDUCTOR CORPORATION 发明人 CHEVALLIER CHRISTOPHE;SIAU CHANG HUA
分类号 G11C11/00 主分类号 G11C11/00
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