发明名称 MEMORY DEVICE HAVING BURIED BIT LINE AND VERTICAL TRANSISTOR AND FABRICATION METHOD THEREOF
摘要 A method of forming a buried bit line is provided. A substrate is provided and a line-shaped trench region is defined in the substrate. A line-shaped trench is formed in the line-shaped trench region of the substrate. The line-shaped trench includes a sidewall surface and a bottom surface. Then, the bottom surface of the line-shaped trench is widened to form a curved bottom surface. Next, a doping area is formed in the substrate adjacent to the curved bottom surface. Lastly, a buried conductive layer is formed on the doping area such that the doping area and the buried conductive layer together constitute the buried bit line.
申请公布号 US2012273874(A1) 申请公布日期 2012.11.01
申请号 US201113094796 申请日期 2011.04.26
申请人 WU TIEH-CHIANG;CHEN YI-NAN;LIU HSIEN-WEN 发明人 WU TIEH-CHIANG;CHEN YI-NAN;LIU HSIEN-WEN
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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