发明名称 |
CLOCK GATED CIRCUIT AND DIGITAL SYSTEM HAVING THE SAME |
摘要 |
<p>PURPOSE: A clock gated circuit and a digital system including the same are provided to maintain the performance of a flip-flop and to reduce power consumption. CONSTITUTION: A pulse generator(120) receives a clock and generates a pulse and an inverse pulse. A pulse level converter(140) receives the pulse and the inverse pulse and converts a level of the pulse in response to an active signal. The pulse generator includes inverters which generates a delay clock, a logical circuit which outputs the inverse pulse, and an inverter which outputs the pulse.</p> |
申请公布号 |
KR20120119780(A) |
申请公布日期 |
2012.10.31 |
申请号 |
KR20110037963 |
申请日期 |
2011.04.22 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, HOI JIN;KONG, BAI SUN |
分类号 |
G06F1/04;H03K19/173 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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