| 发明名称 |
Graphics Rendering Using A Hierarchical Acceleration Structure |
| 摘要 |
A hierarchical acceleration structure may be built for graphics processing using a 32 bit format. In one embodiment, the acceleration structure may be a k-d tree, but other acceleration structures may be used as well. 64 bit offsets are only used when 64 bit offsets are needed. |
| 申请公布号 |
US2012268483(A1) |
申请公布日期 |
2012.10.25 |
| 申请号 |
US200913505007 |
申请日期 |
2009.10.30 |
| 申请人 |
SOUPIKOV ALEXEI;SHEVTSOV MAXIM Y.;RESHETOV ALEXANDER V. |
发明人 |
SOUPIKOV ALEXEI;SHEVTSOV MAXIM Y.;RESHETOV ALEXANDER V. |
| 分类号 |
G09G5/00 |
主分类号 |
G09G5/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
