| 摘要 |
A nonvolatile semiconductor storage device of an embodiment includes: a cell array including a plurality of memory cells formed on a well and configured by a charge accumulating layer and a control gate; a plurality of control gate lines that are paths for supplying a voltage necessary to access the memory cells to the control gates of the memory cells; and an erasing circuit that performs an erasing operation configured by an erasing period during which data of the memory cells are erased and a resetting period during which a post processing of the erasing period is performed, the erasing circuit applying an erasing voltage necessary to erase the data to the well of the memory cells during the erasing period, and discharging the erasing voltage applied to the well of the memory cells to a ground line via the control gate lines during the resetting period. |
