| 摘要 |
A cache phase detector included in a processor core according to example embodiments includes a counting unit and a signal generating unit. The counting unit generates a critical section miscount by counting a request from the processor core resulting in a tag miss and a valid cache line based on a tag miss signal and a cache line valid signal. The signal generating unit compares the critical section miscount from the counting unit with a reference value, and generates a cache phase change signal if the critical section miscount is greater than the reference value.
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