| 摘要 |
PURPOSE: A signal processing circuit is provided to reduce interference and a heating value of power by minimizing interference between intermediate frequency signals. CONSTITUTION: A first FPGA(Field Programmable Gate Array)(200) modulates an input signal inputted from the outside of a signal processing circuit. One or more second FGPAs(250) change the modulated input signal into an intermediate frequency signal. The second FGPAs convert the modulated frequency signal from digital to analog. The first FPGA selects the second FPGA to be activated from the one or more second FPGAs. The first FPGA outputs the modulated input signal. The one or more second FPGAs include a PUC(Programmable Up Converter) which changes the modulated input signal into the intermediate frequency signal. [Reference numerals] (200) First FPGA; (201) Interface; (202) Modulator; (203) Demodulator; (250) Second FPGA; (AA,BB) I channel; (CC,DD) Q channel |
