发明名称 PARTIALLY MULTILAYERED WIRING BOARD AND METHOD OF MANUFACTURING PARTIALLY MULTILAYERED WIRING BOARD
摘要 In order to provide a partially multilayered wiring board without exposing circuits of a mother board printed board even if not separately performing protection process, such as gold plating, a partially multilayered wiring board 1 has a first insulating base material 11 having one main surface formed thereon with first conductive circuit patterns 21 and a second insulating base material 12 laminated on the one main surface of the first insulating base material 11 and having one main surface formed thereon with second conductive circuit patterns 22 smaller than a region where the first conductive circuit patterns 21 are formed, wherein the first conductive circuit patterns 21 are covered by other main surface of the second insulating base material 22.
申请公布号 US2012222887(A1) 申请公布日期 2012.09.06
申请号 US201213474423 申请日期 2012.05.17
申请人 NIKAIDO SHINICHI;HAYAMI TOSHIYUKI;FUJIKURA LTD. 发明人 NIKAIDO SHINICHI;HAYAMI TOSHIYUKI
分类号 H05K1/02;B32B38/10 主分类号 H05K1/02
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