发明名称 Columnar replacement of defective memory cells
摘要 Circuits and methods to compensate for defective memory in BEOL third dimensional memory technology are described. An integrated circuit is configured to perform columnar replacement of defective BEOL multi-layered memory. For example, the integrated circuit can include a primary BEOL memory array having a plurality of BEOL memory cells being configured to change resistivity, a secondary BEOL memory array having another plurality of BEOL memory cells being configured to change resistivity, and a FEOL restoration module associated with the primary BEOL memory array and the secondary BEOL memory array, the FEOL restoration module being configured to locate a BEOL memory cell within the secondary BEOL memory array to replace a defective BEOL memory cell within the primary BEOL memory array. The FEOL portion can be fabricated on a substrate and the BEOL portion can be fabricated above and in contact with the FEOL portion to form the integrated circuit.
申请公布号 US8259520(B2) 申请公布日期 2012.09.04
申请号 US20090592330 申请日期 2009.11.23
申请人 NORMAN ROBERT;UNITY SEMICONDUCTOR CORPORATION 发明人 NORMAN ROBERT
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址