首页
产品
黄页
商标
征信
会员服务
注册
登录
全部
|
企业名
|
法人/股东/高管
|
品牌/产品
|
地址
|
经营范围
发明名称
ΚΑΤΑΣΚΕΥΗ (ΔΟΜΗ) ΜΕ ΠΡΟΚΑΤΕΣΚΕΥΑΣΜΕΝΑ ΣΤΟΙΧΕΙΑ ΚΑΙ ΚΥΒΟΛΙΘΟΣ ΕΚ ΣΚΥΡΟΚΟΝΙΑΜΑΤΟΣ Η ΠΛΙΝΘΟΣ ΔΙΑ ΤΗΝ ΑΥΤΗΝ ΚΑΤΑΣΚΕΥΗΝ.
摘要
申请公布号
GR17645(B)
申请公布日期
1957.03.16
申请号
GR19570117645
申请日期
1957.02.13
申请人
SOCIETA IN ACCOMANDITA SEMPLICE L' INVULNERABILE ESPORTAZIONE
发明人
分类号
主分类号
代理机构
代理人
主权项
地址
您可能感兴趣的专利
FEEDTHROUGH CAPACITOR AND MANUFACTURING METHOD THEREFOR
WIRING SUBSTRATE
PUNCHING METHOD BY LASER TO MOTHER BOARD FOR MULTI-CAVITY WIRING BOARD
INPUT/OUTPUT TERMINAL, SEMICONDUCTOR ELEMENT HOUSING PACKAGE, AND SEMICONDUCTOR DEVICE
METHOD AND APPARATUS FOR CONTROLLING FOUP LOADING PORT, FOUP LOADING PORT CONTROL PROGRAM, AND RECORDING MEDIUM WITH THE PROGRAM RECORDED THEREON
SEMICONDUCTOR LASER MODULE AND ELECTRONIC COOLING UNIT
SHOWER PLATE FOR PLASMA TREATMENT DEVICE, AND MANUFACTURING METHOD THEREOF
CAPACITOR ELEMENT IN SOLID ELECTROLYTIC CAPACITOR, AND MANUFACTURING METHOD THEREOF
SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS
SEMICONDUCTOR LASER ELEMENT AND ITS MANUFACTURING METHOD
AIR CORE COIL
METHOD AND EQUIPMENT FOR MEASURING OSCILLATION LIGHT FREQUENCY OF VARIABLE WAVELENGTH LASER
RADIO ABSORBER
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
MANUFACTURING METHOD FOR HETERO-JUNCTION BIPOLAR TRANSISTOR INTEGRATION LIGHT RECEIVING CIRCUIT
SOLID-STATE IMAGING DEVICE
AUTOMATIC LAYOUT METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND AUTOMATIC LAYOUT PROGRAM THEREFOR
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS
VACUUM LOAD LOCK DEVICE AND ALIGNER
LAMINATED FOIL