发明名称 Configurable memory map interface and method of implementing a configurable memory map interface
摘要 A configurable memory map interface coupled to a circuit element having input/output ports is disclosed. The configurable memory map interface comprises an input coupled to receive an address enabling reading from or writing to the circuit element; a memory storing enable signal parameters, the enable signal parameters controlling timing of enable signals for the reading from or the writing to the circuit element; and an enable signal generator generating the enable signals enabling the reading from or the writing to the circuit element based upon the enable signal parameters stored in the memory. A method of implementing a configurable memory map interface is also disclosed.
申请公布号 US8248869(B1) 申请公布日期 2012.08.21
申请号 US20090581099 申请日期 2009.10.16
申请人 CHAN CHI BUN;OU JINGZHAO;XILINX, INC. 发明人 CHAN CHI BUN;OU JINGZHAO
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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