发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 A control circuit controls various kinds of operations on the memory cell array. The control circuit executes a pre-erase stress application operation in which, when an erase operation on one of the memory cells is executed, prior to the erase operation, a first voltage belonging in a certain voltage range is applied to the control gate while a second voltage having a value smaller than a value of the first voltage is applied to the channel region, whereby a stress is applied to the memory cell due to a potential difference between the first voltage and the second voltage.
申请公布号 US2012195129(A1) 申请公布日期 2012.08.02
申请号 US201113226881 申请日期 2011.09.07
申请人 SHIMURA YASUHIRO;NOGUCHI MITSUHIRO;KABUSHIKI KAISHA TOSHIBA 发明人 SHIMURA YASUHIRO;NOGUCHI MITSUHIRO
分类号 G11C16/14 主分类号 G11C16/14
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