发明名称 PROCESSOR HAVING INCREASED PERFORMANCE VIA ELIMINATION OF SERIAL DEPENDENCIES
摘要 Methods and apparatuses are provided for achieving increased performance via elimination of serial dependencies in instructions or instruction sequences. The apparatus comprises an operational unit for determining whether an instruction will cause dependencies during completion in an execution unit. Responsive to that determination the instruction is replaced with an alternative instruction for completion in the execution unit. In this way, the alternative instruction is completed without causing dependencies in the execution unit. The method comprises determining that an instruction will cause dependencies during completion in a processor and replacing the instruction with an alternative instruction for completion in the processor.
申请公布号 US2012166769(A1) 申请公布日期 2012.06.28
申请号 US20100979946 申请日期 2010.12.28
申请人 FLEISCHMAN JAY E.;SUDHAKAR RANGANATHAN;ADVANCED MICRO DEVICES, INC. 发明人 FLEISCHMAN JAY E.;SUDHAKAR RANGANATHAN
分类号 G06F9/40;G06F9/38 主分类号 G06F9/40
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