发明名称 |
Arrangement and method for controlling power modes of hardware resources |
摘要 |
A circuit arrangement and method of executing program code which utilize power control instructions capable of dynamically controlling power dissipation of multiple hardware resources during execution of a program by a processor. The processor configured to process such power control instructions and to maintain the power modes of the multiple hardware resources to that specified in an earlier-processed power control instruction, such that subsequently-processed instructions will be processed while the power modes of the multiple hardware resources are set to that specified by the earlier-processed power control instruction. |
申请公布号 |
US8181054(B2) |
申请公布日期 |
2012.05.15 |
申请号 |
US201113117314 |
申请日期 |
2011.05.27 |
申请人 |
TERECHKO ANDREI;GARG MANISH;NXP B.V. |
发明人 |
TERECHKO ANDREI;GARG MANISH |
分类号 |
G06F1/32;G06F9/30 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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