发明名称 PRINTED WIRING BOARD, MANUFACTURING METHOD THEREOF, MULTILAYER PRINTED WIRING BOARD, AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To improve connection reliability on the bottom surface of a via hole used for interlayer conduction. <P>SOLUTION: A printed wiring board includes: a first isolation layer 21a that has flexibility; a seed layer 22a that is provided on a first main surface of the first isolation layer 21a; a conductor circuit 23a that is provided on the seed layer 22a; and an interlayer conduction part 24a that is embedded in a via hole penetrating through the first isolation layer 21a and the seed layer 22a and contacts the first conductor circuit 23a exposed on the bottom surface of the via hole. The compatibility between the interlayer conduction part 24a and the first conductor circuit 23a is higher than the compatibility between the interlayer conduction part 24a and the seed layer 22a. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012079766(A) 申请公布日期 2012.04.19
申请号 JP20100221050 申请日期 2010.09.30
申请人 FUJIKURA LTD 发明人 SANO NOBUNORI;KOJIMA AKINORI;ISHIZUKA TAKESHI
分类号 H05K1/11;H05K3/40;H05K3/46 主分类号 H05K1/11
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